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Stefania PERRI - Professori Associati

Stefania PERRI

Professori Associati

Elettronica (IINF-01/A)

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Stefania Perri has the following titles and qualifications: •The diploma of specialized technician in computer science, from the "Istituto Tecnico Industriale A. Monaco" of Cosenza (Italy), in July 1990. •The Master's degree in Computer Science Engineering, from the University of Calabria (Italy), on the 22 October 1996. •The qualification to practice Engineering, on the 3 July 1997. •The PhD in Electronics Engineering, from the University of Reggio Calabria (Italy), on the 5th December 2000. She has appointed the following contracts of research collaboration: •"Structural VHL design of a digital computational unit able to perform the division operation", at the Department of Electronics, Computer Science and Systems, University of Calabria, since the 11/12/96; • "Design of a circumscriptive query system for data bases", at the Department of Electronics, Computer Science and Systems, University of Calabria, since the 4/3/97. During the A.Y. 1996/1997 Stefania Perri joined the University of Reggio Calabria as a contract Professor. During the A.Y. 2001/2002 she joined the University of Calabria as a contract Professor. From the 1 June 2001 to the 30 September 2002 she worked as Post Doctoral Researcher with the group of Electronics at the Department of Electronics Computer Science and Systems (DEIS) of the University of Calabria. The research activity was: Analysis of circuits and architectures for high-speed computations. From the 1 October 2002 to the 31 October 2010 she has been an Assistant Professor of Electronics at the Department of Electronics, Computer Science and Systems (DEIS) of the University of Calabria (Italy). Since the 1 November 2010 she is an Associate Professor of Electronics at the Department of Electronics, Computer Science and Systems (DEIS) of the University of Calabria (Italy). From the 1 October 2005 to the 1 Ottobre 2009 Stefania Perri has been Adjunct Professor at the Department of Electrical and Computer Engineering of the University of Rochester, NY, USA. In the July-August 2004 she has been a Visiting Scientist at the Department of Electrical and Computer Engineering of the University of Rochester, NY, USA. In the year 2003, she has been a visiting professor at the University of Rochester, NY, USA, where she held lessons for the students of the “VLSI Design Project, ECE 262” course. She has responsible for the research project “Realizzazione in tecnologia VLSI di unità di calcolo riconfigurabili ad alto parallelismo per processori multimediali”, funded in the 2003 by the Università degli Studi della Calabria in the context of the program “Giovani Ricercatori”. She has been responsible for the workpackage OR420 of the research project “Compressore Wavelet real-time per immagini ad alta risoluzione” funded by the MIUR FAR n°7543 (Overall cost Euros 816.200) (2004-2006) She is responsible of the research unit "DEIS-UNICAL" and delegated of the Rector for the administrative management of the research project "Sistemi fotovoltaici ad alta concentrazione ed elevata efficienza" Capofila: Beghelli S.p.A. - funded by the Ministero dello Sviluppo Economico (MISE) - Azione "Efficienza Energetica" (Overall cost Euros 11.900.000) (2008-2011). She participated to the research unit of the project “Compressore Wavelet real-time per immagini ad alta risoluzione” funded by the MIUR FAR n°7543 (Overall cost Euros 816.200) (2004-2006) She participated to the research unit of the project MI 01_00052 "WEBS - SISTEMA INTEGRATO WIRELESS MULTIFUNZIONALE PER LA GESTIONE DELL’ENERGIA, DEL BENESSERE E DELLA SICUREZZA" Capofila: Beghelli S.p.A. - funded by the Ministero dello Sviluppo Economico (MISE) (Overall cost Euros 8.117.000) (2010-2013) She participated to the research unit of the project "MODERN: MOdeling and DEsign of Reliable, process variation-aware Nanoelectronic devices, circuits and systems" Programma Cooperativo Europeo JTI ENIAC 120003 - MIUR 4825/E (Overall cost Euros 37.612.640) (2009-2012) She participated to the research unit of the project "ERG: Energy for a Green Society: from sustainable harvesting to smart distribution. Equipments, materials, design solutions and their applications" Programma Cooperativo Europeo JTI ENIAC-2010-1_270722-2ERG (Overall cost Euros 25.611.684) (2011-2014) She participated to the research unit of the project "E2SG - Energy to Smart Grid" Programma Cooperativo Europeo JTI ENIAC 296131 (Costo complessivo Euro 36.186.509) (2012-2015) Stefania Perri co-authored 120 papers (58 published in international journals, 48 published in the proceedings of international conferences, 9 in international books, 3 patents, 2 technical reports). She personally promoted research activities in the following topics: 1. Design of binary arithmetic circuits based on Quantum-Dot Cellular Automata (QCA) 2. Design of algorithms and VLSI circuits for elaborating stereoscopic images; 3. Design of self-timed circuits for clock-less digital systems; 4. Design of arithmetic circuits for multimedia applications; 5. Design of co-processor modules for realizing Programmable System-on-Chip. Moreover, she contributed to joint works focusing the attention mainly to the following aspects: logic design of CMOS architectures and nanostructures; electric analysis of low-power circuits; design of algorithms for the hardware implementation of special circuits oriented to the image processing; performing experiments to verify and tests the novel designed structures. Main research topics. 1) Design of binary arithmetic circuits based on Quantum-Dot Cellular Automata (QCA). In this context, Stefania Perri proposed an innovative methodology validated by proving three theorems that allow QCA-based adders to be designed more efficiently using the logic gates inherently available in the QCA technology: the inverter and the Majority gates. When it is applied to realize Carry-Look-Ahead and Brent Kung adders, the proposed methodology allows the active area to be significantly reduced with respect to QCA adders known in literature. A Ripple-Carry adder designed exploiting the novel proven theorems, achieves the best area-delay trade-off. Its 64-bit version occupies only 18um^2 and requires just 36 clock phases to perform the generic addition operation. 2) Design of special-purpose architectures and circuits for the image processing In this context, Stefania Perri designed innovative memory architectures for the integration within high-speed digital systems dedicated to the image processing. The designed memory structures are suitable for the implementation with Rad-Tolerant programmable devices oriented to aerospace applications. She also designed digital stereovision systems to elaborate two image captured from an observed scene. In this way it is possible computing information about the relative distances between objects/subjects in the scene or between an object/subject in the scene and the observation point. A complete stereovision system has been implemented within a low-cost FPGA device. Moreover, she designed a novel algorithm that allows computing depth maps achieving high-speed (it can operate in real-time) and assuring high qualities. She designed an image compressor system based on the discrete Wavelet transform and an innovative encoding approach obtained as a modified and improved version of the SPIHT algorithm. Several prototypes have been realized using programmable devices also in their ra-tolerant version and ASIC devices manufactured with the AMS 0.35um and the STM 90nm technologies. Remarkable is the design of co-processor modules oriented to the matrix processing and the convolution that were structured to be integrated with general-purpose processors within programmable high-speed low-cost Systems-on-Chip for the image processing. Demonstrators of these designed circuits have been realized using FPGA devices. 3) Design of digital circuits using nanometer CMOS technologies for low-power applications. In this context the candidate has designed a novel SRAM memory cell that, in contrast with the conventional low-leakage cells, allows applying appropriate techniques for reducing the static power consumption without increasing the dynamic power dissipation, thus ensuring a reduction of the overall energy dissipation. She also defined and then validated analytical models developed to estimate the delay of sub-threshold logic gates and to evaluate the noise immunity of high fan-in logic gates. It is worth pointing out that the novel models take into account the effects due to the process variations and the operating conditions. 4) Design of CMOS aritmetic circuits for high-speed computations. This research activity has been partially conducted in cooperation with the Idaho State University, Pocatello, USA. The candidate has designed an innovative technique to speed-up the carry propagation within high-speed addition architectures. The proposed technique has been patented (Patent US 7,016,932 B2) and it has been verified through prototypes realized using both the Standard-Cells and the Full-custom design approaches with the AMS 0.35 CMOS technology. The candidate has also designed special arithmetic circuits based on cellular arrays and able to perform the division and the square root operations. The designed arrays have been analyzed to recognize the logic style leading with the best area-delay-power trade-off. Also in this case, the research activity has been supported by a prototype manufactured with the AMS 0.8um CMOS technology. Stefania Perri has invented a design technique to realize self-timed arithmetic circuits using the conventional static CMOS Standard-Cells, thus reducing the efforts required to produce the layout when dynamic CMOS logic style is applied. Two prototypes of have been realized using the AMS 0.35um CMOS technology. 5) Design of special modules and architectures for elaborating multimedia signals. In this context, the candidate has designed innovative circuits for the addition and multiplication operations oriented to multimedia applications. These circuits can adapt theme selves to different operands wordlengths, ensuring that the most appropriate parallelism level is always achieved for each specific application. The circuits can be configured without introducing additional delay to the critical computational paths. This on-the-flight configuration technique has been applied to a coarse-grain architecture purposely designed for complex multimedia elaborations. The basic cell consists of a local memory bank and of logic circuits needed to perform computations and to transfer data. It has been realized using the STM 180nm technology and a demonstrator has been realized using a development board provided with a FPGA chip in which 16 cells have been mapped to execute several benchmarks and to evaluate achievable performances. Stefania Perri cooperates or have cooperated to the following international research activities. • Research project “VLSI design of low-power high-speed binary adders”, developed in cooperation with the College of Engineering, Idhao State University (USA). The activity led to the US patent US 7,016,932 B2. • Research project “New Concepts in Multigigahertz Computation”, developed in cooperation with the University of Rochester, NY, USA. • Research project “Smart card security from power attacks”, developed in cooperation with the University of Rochester, NY, USA. Stefania Perri has been awarded for her research activity with the following prizes: PREMIO: BEST PAPER AWARD The paper “Color Invariant Study for Background Subtraction” (of the Authors L.Guachi, G.Cocorullo, P.Corsonello, F.Frustaci,S.Perri), presented at the International Conference on Advances in Circuits, Electronics and Micro-electronics (CENICS 2016), has been awarded with “the BEST PAPER AWARD”. BEST PAPER AWARD The paper “VLSI Circuits for Accurate Motion Estimation” (of the Authors S.Perri, P.Corsonello, G.Cocorullo), presented at the International Conference on Advances in Circuits, Electronics and Micro-electronics (CENICS 2010), has been awarded with “the BEST PAPER AWARD”. BRONZE LEAF The paper “A new scheme to reduce leakage in deep-submicron cache memories with no extra dynamic consumption” (of the Authors F.Frustaci, P.Corsonello, S.Perri, G.Cocorullo), presented at the IEEE Conference PRIME’06, has been awarded with “the bronze leaf certificate”. INVITED PAPER: The paper "A New Reconfigurable Coarse-Grain Architecture for Multimedia Applications" (of the Authors M.Margala, M.Lanuzza, S.Perri, P.Corsonello) has been invited in the oral session "Adaptive and Reconfigurable Circuits for Multimedia" of the conference NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2007). INVITED PAPER: The paper “Fast, low-cost adders using carry-strength signals”, (of Authors V.Kantabutra, P.Corsonello, S.Perri) has been invited for the oral presentation at the Computer&Business Conference SSGRR 2000. SELECTED BEST PAPER: The paper “Design-Space Exploration of Energy-Delay-Area Efficient Coarse-Grain Reconfigurable Datapath” (of the Authors S.Purhoit, M.Lanuzza, S.Perri, P.Corsonello, M.Margala) has been selected among the best papers presented at the International Conference on VLSI design, New Delhi (India) 2009. SELECTED BEST PAPER: The paper “An Efficient and Low-Cost Design Methodology to Improve SRAM-based FPGA Robustness in Space and Avionics Applications” (of the Authors M.Lanuzza, P.Zicari, F.Frustaci, S.Perri, P.Corsonello) has been selected among the best papers presented at the International Workshop on Reconfigurable Computing: Architectures, Tools and Applications, Karlsrue (Germania) 2009. The research activity conducted by Stefania Perri regarding the Design of CMOS arithmetic circuits suitable for the integration with high-speed general-purpose processors and Digital Signal Processors, led to a US patent and one Italian patent: “Adders and Bit Blocks having an internal propagation characteristic independent of a carry input to the bit block and methods for using the same” (of the Authors V. Kantabutra, P. Corsonello, S. Perri) Patent N° US 7,016,932 B2, 2006. “Circuito integrato digitale per operazioni di somma binaria in sistemi asincroni ad alta velocità” (of the Authors G.Cocorullo, P.Corsonello, S.Perri), UPICA n° 5836, 1998. Moreover, during the research activity performed in cooperation with the University di Rochester (New York, USA) has been developed a provisional application: “Charge-Pump Based Subsystem for Secure Smart-Card Design” (of the Authors P.Corsonello, S.Perri, M. Margala) USPTO Application 11/331,362 – WO 2006/076591 A2. In December 2003, Stefania Perri chaired the session “VLSI – Low Power” of 10th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2003), Sharjah, Arab Emirates. In July 2010 she chaired the session “Application-Oriented Electronics” of the third International Conference on Advances in Circuits, Electronics and Micro-electronics (CENICS 2010), Venice, Italy. Stefania Perri is (or has been) peer reviewer for the following international journals: • IEEE Transactions on Image Processing; • IEEE Transactions on Circuits and Systems for Video Technology; • IEEE Transactions on Circuits and Systems II; • IET Circuits, Devices & Systems; • IEE Proceedings on Circuits, Devices & Systems; • IEE Electronics Letters; • IEEE Transactions on VLSI Systems; • International Journal of Circuit Theory and Applications • Journal of Systems Architecture • International Journal of Electronics • Journal of Recent Patents on Signal Processing She also participates (or has participated) to the editorial/revision commitees of the following international Conferences: • Annual Conference of the IEEE Industrial Electronics Society (IECON 2001) • International Conference on Field Programmable Logic and Applications (FPL03); • IEEE International Conference on Electronics, Circuits and Systems (ICECS 2003) • The European Conference on Circuit Theory and Design (ECCTD 05); • Defect and Fault Tolerance Symposium (DFT 05); • IEEE International Symposium on Circuits and Systems (ISCAS 05); • IEEE International Symposium on Circuits and Systems (ISCAS 06); • IEEE International Symposium on Circuits and Systems (ISCAS 07); • IEEE International Conference on Signal Processing and Communication (ICSPC 2007) • IEEE International Conference on Electronics, Circuits and Systems (ICECS 2009) • IEEE International Symposium on Circuits and Systems (ISCAS 09) • IEEE International Conference on Emerging Trends in Engineering and Technology (ICETET 2010) • International Conference on Advances in Circuits, Electronics and Micro-electronics (CENICS 2010) • IEEE International Conference on Computer Design, (ICCD 2011) • International Conference on Advances in Circuits, Electronics and Micro-electronics (CENICS 2011) • IEEE International Symposium on Circuits and Systems (ISCAS 2012); • IEEE International Symposium on Circuits and Systems (ISCAS 2013); In 2001, she has also been a peer reviewer for the Idaho State University (USA) in the assignment of the Distinguished Researcher Award. In 2011, Stefania Perri has been involved by the Idaho State University (USA) in the academic review process for the "promotion to full Professor". From January 2008 to December 2009, Stefania Perri has been a member of the committee for the entrance examination of master-level students of the Electronics Engineering at the University of Calabria (Italy). In the A.Y. 2009-2010 she was a member of the committee for the qualification of graduate candidates at the University of Calabria (Italy) to practice Engineering. Since March 2003, she is a member of the committee for the self-assessment of the Master-level courses of Electronics Engineering. From January 2004 to May 2009, she has been a member of the committee for gender equality of the Engineering Faculty at the University of Calabria (Italy). In the context of this activity, she obtained funding by the "Assessorato al Lavoro e alle Politiche Giovanili della Provincia di Cosenza" to stimulate women towards Engineering degrees. To this aim, six and four scholarships have been funded in the A.Y. 2005/2006 and in the A.Y. 2009-2010, respectively. In the A.Y.02-03, she has been responsible for the careers monitoring of the students enrolled in Electronics Engineering degrees at the University of Calabria (Italy). In the A.Y. 02-03 she has been a member of the Socrates committee of the Engineering Faculty at the University of Calabria (Italy). From October 2003 to October 2008, she has been a member of the PhD committee of the PhD course in Electronic Engineering, at the University of Reggio Calabria (Italy). From October 2008 to October 2012 she has been a member of the PhD committee of the PhD course in "Psychology of programming and artificial intelligence", at the University of Calabria (Italy). Since 1996 she has been teacher of 34 courses oriented to both bachelor and master level students of Electronics Engineering and Computer Science Engineering at the University of Calabria, and 3 courses oriented to PhD students at the University of Reggio Calabria. She has also been supervisor of about 50 Master and Bechelor degrees thesis developed by students of Electronics Engineering and Computer Science Engineering
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